Input offsets of amplifiers in circuits such as Analog-to-Digital (ADC) and Digital-to-Analog (DAC), voltage amplifiers, sample-and-holds, etc., often limit the minimum resolutions of these circuits. It is, therefore, critical to cancel out these amplifiers' offset, when circuit accuracy is impacted by the magnitude of these input offsets (e.g., usual amplifier input offsets are in the order of 1˜10 mV). At the same time, 1/f noise which is dominant at low frequencies will be concurrently reduced with input offset cancellation. This further improves circuit accuracy.
Two general categories of offset cancellation are already in use: (1) Chopper Stabilization and (2) Autozeroing. In chopper stabilization, a low pass filter is usually required at the output of these amplifiers to reduce the magnitude of the output swing caused by chopping.
In single-ended output sample and hold DAC configuration, the DAC output is often not offset-free in both sample and hold modes, as illustrated in FIGS. 1A and 1B. FIG. 1A shows a single-ended output sample and hold DAC 104 in a hold mode of operation. During the hold mode of operation the offset of the amplifier 108 is stored on both the intermediate capacitor Cint and supply capacitor Cs. As shown in FIG. 1B, when the circuit 104 is in a sample mode of operation, the offset of the amplifier 108 is now cancelled out at output voltage Vout. The offset of the amplifier 108 is effectively null out in the output voltage Vout during the sample mode, but not in the hold mode. From FIG. 1B, it can be seen that the holding capacitor Ch stores the offset-nulled output voltage Vout with respect to the common voltage Vcom. Hence, the holding capacitor Ch does not contain the offset content of the amplifier 108. In the hold mode, the offset of the amplifier is not removed. This creates a pedestal in the output voltage Vout, as shown in FIG. 1C.
Additional errors due to charge injection upon switch turn off of the holding capacitor Ch adds to the pedestal in the output voltage Vout. In this structure of FIGS. 1A-C, offset present in the common voltage Vcom reference is doubled at the output voltage Vout. Furthermore, continuous chopper stabilization is not feasible for the depicted DAC structure because the chopper has to be disabled during the sample mode or else larger output offsets will be created. If chopper stabilization is also used on the common voltage Vcom reference, the total energy of the offset swing at the output voltage Vout could easily be on the order of +/−20 mV, which at a low output voltage Vout level (e.g., 50 mV) is approximately +/−40% of the output voltage Vout level. This offset is significantly large and could easily result in the output voltage Vout inaccuracies due to imperfections such as uneven up/down slew profiles of offset swings.